46 lines
1.3 KiB
C
46 lines
1.3 KiB
C
#include "types.h"
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#include "param.h"
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#include "memlayout.h"
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#include "riscv.h"
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#include "defs.h"
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void timerinit();
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// a scratch area per CPU for machine-mode timer interrupts.
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uint64 timer_scratch[NCPU][5];
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// assembly code in kernelvec.S for machine-mode timer interrupt.
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extern void timervec();
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// arrange to receive timer interrupts.
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// they will arrive in machine mode at
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// at timervec in kernelvec.S,
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// which turns them into software interrupts for
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// devintr() in trap.c.
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void timerinit() {
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// each CPU has a separate source of timer interrupts.
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int id = r_mhartid();
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// ask the CLINT for a timer interrupt.
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int interval = 1000000; // cycles; about 1/10th second in qemu.
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*(uint64 *)CLINT_MTIMECMP(id) = *(uint64 *)CLINT_MTIME + interval;
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// prepare information in scratch[] for timervec.
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// scratch[0..2] : space for timervec to save registers.
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// scratch[3] : address of CLINT MTIMECMP register.
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// scratch[4] : desired interval (in cycles) between timer interrupts.
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uint64 *scratch = &timer_scratch[id][0];
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scratch[3] = CLINT_MTIMECMP(id);
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scratch[4] = interval;
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w_mscratch((uint64)scratch);
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// set the machine-mode trap handler.
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w_mtvec((uint64)timervec);
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// enable machine-mode interrupts.
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w_mstatus(r_mstatus() | MSTATUS_MIE);
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// enable machine-mode timer interrupts.
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w_mie(r_mie() | MIE_MTIE);
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}
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